1. Field of the Invention
The present invention relates to control systems and, more particularly, to a time base generator for providing a first clock signal and a second clock signal, and to a method for providing the first and second clock signals.
2. Description of the Related Art
Pulse radar ranging systems, such as those described in U.S. Pat. No. 4,521,778 to Knepper, provide distance or level measurements based on the direct measurement of the propagation time of microwave pulses transmitted to and reflected from a target, e. g., the surface of a fill material in a container. The propagation time for distances of a few meters is in the nanosecond range. As a result, a special time transformation procedure is required to enable measurement of these short time periods. The microwave pulses are transmitted to the target at a repetition rate or transmit clock frequency which is supplied by a transmit clock generator. In a signal mixer, the received echo pulses reflected from the target are sampled by cross-correlation with sampling pulses having the same shape as the transmit pulses, but at a sampling clock frequency that is slightly lower than the transmit clock frequency. The cross-correlation and subsequent integration or low-pass filtering leads to an intermediate frequency signal corresponding to the received echo pulses but time-expanded relative thereto by a factor of T1/(T1−T2), where T1 is the transmit pulse repetition period and T2 is the sampling period. The time-expansion allows for amplifying, digitizing and further processing of the echo pulses with standard techniques.
Providing the transmit clock frequency and the sampling clock frequency requires a time base of very fine resolution, high accuracy, linearity and stability as these are directly related to measurement error. The jitter of the time base has to be maintained low because, when the jitter becomes significant with respect to the period of the carrier signal (microwave), the intermediate frequency signal suffers distortions, amplitude fluctuations and even cancellations.
The time base signals can be generated with digital or with analog circuits.
A digital time base generator having two clock signal generators of slightly different frequencies can benefit from the use of crystal oscillators and phase-locked loop (PLL) circuits, which allows the achievement of high accuracy and low jitter. However, as the oscillators start up, the phase difference between the clock signals is not predictable. If a detector for a zero phase delay is used, the detector has to be able to operate in the picoseconds range. Zero phase detector errors may diminish the merits of the digital solution and the measurement time is increased because a waiting time for zero phase detection has to be added.
An analog time base uses a linear ramp to generate the variable time delay. The thermal drift of the components results in time delay variations over temperature. U.S. Pat. No. 7,446,699 to McEwan discloses a technique that compensates such a thermal drift error. However, the analog signals having slower variation still produces a larger jitter from the voltage noise than the digital signals with fast transitions.
U.S. Pat. No. 4,943,787 to Swapp discloses a digital time base generator comprising a base clock signal generator providing a base clock signal at a base frequency, a first frequency multiplier multiplying the base frequency by a first integer to produce a first auxiliary signal, a first frequency divider dividing the frequency of the first auxiliary signal by the first integer to generate a first clock signal, a second frequency multiplier multiplying the base frequency by a second integer to produce a second auxiliary signal, and a second frequency divider dividing the frequency of the second auxiliary signal by the second integer to generate a second clock signal. Accordingly, the frequencies of the first and second clock signals are the same and identical to the base frequency. By altering the first or second integer divisor for a given number of cycles, a defined time delay can be set between the first and second clock signal.
EP 2 207 263 A1 discloses a base clock signal generator providing a base clock signal at a base frequency f, a first frequency divider dividing the base frequency by a first integer N to produce a first auxiliary signal, a first frequency multiplier multiplying the frequency of the first auxiliary signal by a factor K to generate the first clock signal, a second frequency divider dividing the base frequency by a second integer M to produce a second auxiliary signal, and a second frequency multiplier multiplying the frequency of the second auxiliary signal by the factor K to generate the second clock signal. Accordingly, the frequency of the first clock signal is K·f/N and that of the second clock signal K·f/M. When setting K=N, the frequency of the first clock signal is equal to the base frequency f, and the first frequency divider and the first frequency multiplier can be omitted.
In practice, the frequencies of the first and second clock signals may be 3.000000 MHz and 2.999970 MHz, which requires the integer divisors N=300000 and M=299997. Accordingly, a major disadvantage of this conventional technique may be the long response time because the frequency multiplication is performed by a phase-locked loop (PLL) and each frequency adjustment can only be made after the two signals are checked around the coincidence moment when N periods of the first clock signal=M periods of the second clock signal. Several corrections are necessary to lock the PLL, and when large N and M divider ratios are required, it takes a very long time to bring the PLL into lock.
Another disadvantage may arise from the use of digital circuits that limit the circuit operation to integer numbers.